Our client is one of the world’s largest and most successful IC design semiconductor/Wafer Fabrication company. They provide the ultimate in pioneering IC technology to create unique and innovative designs for a broad range of high-tech applications.
- Work with SoC Integration and SoC Timing on power structure optimization.
- Work on UPF development to support different stages of implementation flow and SoC verification.
- Work on power structure, eg. Isolation of power domains, level-shifter crossing voltage domains
- Conduct power structure check at different implementation stages.
- Support back-end implementation on power structure and optimization.
- Bachelor’s or Master’s Degree in Electronic Engineering with ASIC design experience.
- Familiar with ASIC design flow.
- Experience in UPF development and power check.
- Good understanding of Power structure.
- Familiar with UNIX/ Linux environment and scripting.
- Good communication and interpersonal skills.
- Strong analytical and problem-solving skills.